Universal logic gates are a special type of logic gate that can be used to implement any Boolean function. This means that any digital circuit can be constructed using only these gates.
NAND Gate
Nand Gate Performs the Nand Operation which is the inversion of the AND operation.
If we Try to look at the Boolean Expression for Nand Gate
Y = (A.B)’
Y = A’ + B’ // According to the De Morgan’s Law
The output generated by the NAND gate would be Or operation between the complimented or inverted form of the given inputs
The Symbol of NAND gate is identified by a small bubble to an AND gate.
And the Truth Table of Nand Gate is exactly the inverted output of the basic AND gate
NAND in VHDL
Library Declaration
Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;Entity Declaration
Entity NANDGate is
Port(A, B: in std_logic; Y : out std_logic);
end NANDGate;The choice of name is user defined but it is necessary to keep the name same everywhere wherever Entity has to be mentioned, like in the Architecture below.
Architecture Behavioral of NANDGate is
Begin
Process(A,B)
begin
Y <= A nand B;
end process;
end Behavioral;
Here we give the name ‘Behavioral’ to the Architecture which is User-defined and as we can see we use the same name of the Entity that was declared in the Entity block which is ‘NANDGate’.
Although VHDL is case insensitive it is a good programming practice to use the Upper case and lower case letters.
NOR Gate
Nor gate is the inverted output of the OR gate.
The Boolean Expression of NOR logic would be
Y = (A + B)’
Y = A’.B’ // The De Morgan’s Law
The output generated by the NOR gate would be the And operation between Compliments of the given input
The Symbol of NOR gate is the Inverting bubble stuck in front of the OR gate.
NOR gate in VHDL
Library Declaration
Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;Entity Declaration
Entity NORGate is
Port(A, B: in std_logic;
Y: out std_logic);
end NORGate; Defining the Behavior of NOR gate
Architecture Behavioral of NORGate is
begin
process(A, B)
begin
Y <= A nor B;
end process;
end Behavioral;Universal NAND
NAND as OR
If we feed inverted inputs to the NAND gate using the inverter or the not gate we are bound to get the result as, OR operation between A and B
Nand as NOT
Not operation can be performed by the Nand gate if the inputs of the Nand gate is shorted and a single input is provided, because as we know NOT operation is single input operation
Nand as AND
Trying to make an AND gate using NAND gate is just inverting the output of the Nand gate as Nand itself gives out the inverted result of an And gate and compliment of a compliment is just the pure input that has been given
Universal NOR
NOR as AND
Inverting the inputs that are being given even before NOR operation happens gives us an AND output
NOR as NOT
Getting a Not output using NOR gate is as easy as getting the not output from NAND gate, because it is literally shorting the inputs an giving a single input to get the NOT output
NOR as OR
Adding an inverter to the nor gate would give us the output of the OR gate, because NOR operation is the inverted output of OR operation, and compliment of a compliment is it’s initial pure form.
