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Introduction to the Power down and Idle mode in 8051

Introduction to Power Saving Mode in 8051

The 8051 microcontroller includes features for power-saving modes, specifically Power Down and Idle modes, designed to reduce power consumption. These modes are particularly beneficial in embedded applications where minimizing power usage is crucial. The built-in power-saving capabilities of the 8051 help extend battery life and enhance the efficiency of devices that rely on this microcontroller.

8051 Power Control Logic

8051 microcontroller has two power-saving modes,

  • Power Down Mode
  • Idle Mode

Difference Between Power Down and Idle Mode

The 8051 power control logic includes two control bits: IDL and PD, which are used to manage Idle and Power Down modes, respectively.

  • Power Down Mode: In this mode, the oscillator clock that drives the system is turned OFF, resulting in both the CPU and peripherals being inactive. This significantly reduces power consumption as the entire microcontroller effectively halts its operation.
  • Idle Mode: Here, only the clock supplied to the CPU is deactivated, while the clocks for the peripherals remain active. This allows the peripherals to continue functioning, though the CPU is not processing any instructions.

As a result, the power savings achieved in Power Down mode are greater than those in Idle mode due to the complete cessation of activity in the former.

The table below illustrates the power supply current required for 8051 family controllers in various modes: Normal (Active), Idle, and Power Down.

8051 ControllersOperating Oscillator FrequencyFosc.Current required in Normal modeCurrent required in Idle modeCurrent required in Power Down mode
AT89S5112 MHz25mA6.5mA50uA
P89V51RD212 MHz11.5mA8.5mA80-90uA
DS80C32318 MHz10mA6mA0.1uA for BGR enabled.40uA for BGR disabled.

As indicated in the above table, power consumption in power-down mode is lower than in both normal and idle modes.

The 8051 microcontroller features a power control register to manage its power states. Let’s take a closer look at the power control register.

PCON Register: Power Control Register

The PCON (Power Control) register is utilized to enable power-saving modes in the 8051 microcontrollers. This register includes two bits for power-saving modes and one bit for controlling the serial baud rate.

  • Bit 7 – SMOD:
  • 1: Doubles the baud rate in UART modes 1, 2, and 3.
  • 0: No effect on the baud rate.
  • Bits 3:2 – GF1 & GF0:
  • These are general-purpose flags for user-defined functions.
  • Bit 1 – PD (Power Down):
  • 1: Enables Power Down mode. In this mode, the oscillator clock is turned off, and both the CPU and peripheral clocks are stopped. This mode can be exited with a hardware reset.
  • 0: Disables Power Down mode.
  • Bit 0 – IDL (Idle):
  • 1: Enables Idle mode. The CPU clock is turned off, but internal peripheral modules, such as timers, the serial port, and interrupts, continue to function normally. This mode can be exited via an interrupt or a hardware reset.
  • 0: Disables Idle mode.

Example of 8051 Idle Mode

In this example, we will program the AT89C51 microcontroller to toggle Pin 0 of Port 1 and put the microcontroller into Idle (sleep) mode using External Interrupt 1. The microcontroller will return to normal mode through External Interrupt 0.

Programming Steps

  1. Enable Interrupts:
    Enable the global interrupt and both External Interrupt 0 and External Interrupt 1 by setting EA = 1 and EXx = 1.
  2. Select Interrupt Trigger Type:
    Set the interrupt to trigger on the falling edge by configuring ITx = 0.
  3. Set Interrupt Priority (Optional):
    Use the IP register to set the priority for each interrupt if needed.
  4. Exit Sleep Mode with Reset Pin:
    The controller’s sleep mode can also be canceled by using the reset pin.
  5. Control Idle (Sleep) Mode Using the PCON Register:
    Enable Idle mode by setting the appropriate bit in the PCON register.
  6. Implement Interrupt Service Routines (ISRs):
  • In the External Interrupt 1 ISR, enable Idle mode to put the microcontroller to sleep.
  • In the External Interrupt 0 ISR, disable Idle mode to wake the microcontroller back into normal operation.

By following these steps, you can toggle a pin while efficiently using Idle mode to conserve power, allowing the microcontroller to enter and exit sleep mode through interrupts.

Program for 8051 Idle (sleep) mode

/*
 * 8051_Idle_mode
 * http://www.electronicwings.com
 */
#include <reg51.h>		/* Include x51 header file */
sbit test = P1^0;		  	 		

void delay(k)			/* mSecond Delay function for Xtal 11.0592 MHz */
{
	int i,j;
	for (i=0;i<k;i++)
		for (j=0;j<112;j++);
}

void ExtInt_Init()		/* External interrupt initialize */
{
	IT0 = 1;      		/* Interrupt0 on falling edge */
	EX0 = 1;      		/* Enable External interrupt0 */
	IT1 = 1;      		/* Interrupt1 on falling edge */
	EX1 = 1;      		/* Enable External interrupt1 */
	EA  = 1;		/* Enable global interrupt */
	IP = 0x01;		/* Set highest priority for Ext. interrupt0 */
}
											
void External0_ISR() interrupt 0 /* External int0 ISR */
{
	PCON = 0x00;		 /* Disable Idle & Power Down mode */
}

void External1_ISR() interrupt 2 /* External int1 ISR */
{
	PCON = 0x01;		 /* Enable Idle mode */
				 /* Enable Power Down mode by PCON = 0x02; */
}

void main()
{
  ExtInt_Init(); 
	while(1)		 /* Toggle P1.0 continuous */
	{
		test = 0;
		delay(30);
		test = 1;
		delay(30);
	}
	
}

8051 Power-Down Mode

To activate power-down mode in the 8051 microcontroller, set the PD bit by configuring PCON = 0x02. Note that, in most cases, only a hardware reset can exit this mode.

Note: The behavior of exiting power-down mode varies by manufacturer:

  • Intel’s MCS-51 Family User Manual states:
    “The only way to exit Power-Down mode on the 80C51 is through a hardware reset. The reset redefines all the SFRs, but it does not affect the on-chip RAM.”
  • Atmel’s AT89S51 Datasheet specifies:
    “Exit from Power-Down mode can be achieved either by a hardware reset or by an enabled external interrupt (INT0 or INT1). A reset redefines the SFRs but does not modify the on-chip RAM.”

Thus, for the AT89S51 controller, power-down mode can be exited either through a reset or by an external interrupt (INT0 or INT1).

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