“How to Understand 8051 Microcontroller Interrupts: Types, Functions, and Programming Guide”

Introduction to 8051 Microcontroller Interrupts

An interrupt is an event that disrupts the regular flow of execution, similar to receiving a call while engaged in a task. Based on its priority, you may choose to attend to or ignore it.

In microcontrollers, the 8051 architecture manages five interrupt sources: two are internal (timer interrupts), two are external, and one is a serial interrupt. Each interrupt has a specific vector address. The highest priority interrupt in the 8051 microcontroller is the Reset, which has a vector address of 0x0000.

Vector Address: This is the address that the controller jumps to in order to execute the Interrupt Service Routine (ISR) when an interrupt occurs.

Reset

The Reset is the highest-priority interrupt in the 8051 microcontroller. Upon reset, the microcontroller starts executing code from the address 0x0000.

8051 Internal Interrupt (Timer Interrupt)

The 8051 microcontroller has two internal interrupts, Timer0 and Timer1. When a timer overflows, the respective overflow flag (TF0 for Timer0, TF1 for Timer1) is set. The microcontroller then jumps to the associated vector address to handle the interrupt. To enable this function, both global and timer-specific interrupts must be enabled.

8051 Serial Interrupt

The 8051 microcontroller includes a serial communication port with associated serial interrupt flags (TI for Transmit Interrupt and RI for Receive Interrupt). When the last bit (stop bit) of a transmitted byte is sent, the TI flag is set. Similarly, when the last bit of a received byte is detected, the RI flag is set, indicating data reception.

IE Register: Interrupt Enable Register

The IE register is used to enable or disable specific interrupt sources on the 8051 microcontroller.

IE Register: Bit Descriptions

• Bit 7 – EA (Enable All Interrupts)
• 1: Enables all interrupts
• 0: Disables all interrupts
• Bits 6, 5 – Reserved Bits (Unused)
• Bit 4 – ES (Enable Serial Interrupt)
• 1: Enables the serial interrupt
• 0: Disables the serial interrupt
• Bit 3 – ET1 (Enable Timer1 Interrupt)
• 1: Enables the Timer1 interrupt
• 0: Disables the Timer1 interrupt
• Bit 2 – EX1 (Enable External1 Interrupt)
• 1: Enables the External1 interrupt
• 0: Disables the External1 interrupt
• Bit 1 – ET0 (Enable Timer0 Interrupt)
• 1: Enables the Timer0 interrupt
• 0: Disables the Timer0 interrupt
• Bit 0 – EX0 (Enable External0 Interrupt)
• 1: Enables the External0 interrupt
• 0: Disables the External0 interrupt

8051 MCU Interrupt priority

Interrupt Priority: The priority of interrupts in the 8051 microcontroller can be assigned using the Interrupt Priority Register (IP). This register allows you to set different priority levels for each interrupt, enabling the system to determine which interrupt should be serviced first when multiple interrupts occur simultaneously.

In the table, the interrupt priorities upon reset are outlined. According to the 8051 interrupt priority scheme, lower-priority interrupts will not be serviced until the microcontroller has finished handling higher-priority interrupts. If multiple interrupts occur simultaneously, the microcontroller queues them based on their priority levels.

IP Register: Interrupt priority register

IP Register: The Interrupt Priority Register (IP) in the 8051 microcontroller is used to assign priority levels to various interrupts. This allows the system to manage and prioritize interrupt servicing effectively, ensuring that higher-priority interrupts are addressed before lower-priority ones.

IP Register: Bit Descriptions

• Bits 7, 6, 5 – Reserved Bits (Unused)
• Bit 4 – PS (Serial Interrupt Priority Bit)
• 1: Assigns high priority to the serial interrupt
• 0: Assigns low priority to the serial interrupt
• Bit 3 – PT1 (Timer1 Interrupt Priority Bit)
• 1: Assigns high priority to the Timer1 interrupt
• 0: Assigns low priority to the Timer1 interrupt
• Bit 2 – PX1 (External Interrupt 1 Priority Bit)
• 1: Assigns high priority to the External1 interrupt
• 0: Assigns low priority to the External1 interrupt
• Bit 1 – PT0 (Timer0 Interrupt Priority Bit)
• 1: Assigns high priority to the Timer0 interrupt
• 0: Assigns low priority to the Timer0 interrupt
• Bit 0 – PX0 (External Interrupt 0 Priority Bit)
• 1: Assigns high priority to the External0 interrupt
• 0: Assigns low priority to the External0 interrupt

External Interrupts in 8051

The 8051 microcontroller features two external interrupts, INT0 and INT1. These interrupts allow the controller to respond to external signals by detecting levels or edges on the corresponding pins, PORT 3.2 and PORT 3.3. For the microcontroller to respond to these external interrupts, both global and external interrupts must be enabled.

When an external interrupt occurs, the microcontroller completes the execution of the current instruction and then jumps to the appropriate Interrupt Service Routine (ISR) to handle the interrupt.

In contrast to the polling method, where the microcontroller continuously checks for a pulse on the interrupt pins, the interrupt method allows the microcontroller to remain idle until an interrupt occurs, at which point it services the interrupt request immediately.

Types of External Interrupt Activation Levels

The 8051 MCU supports two types of external interrupt activation levels:

1. Edge Triggered:
   Interrupts occur on the detection of rising or falling edges on the interrupt pins.
2. Level Triggered:
   Interrupts occur based on high or low levels detected on the interrupt pins.

Activation Levels in 8051

The 8051 MCU utilizes two specific types of activation levels:

• Low Level Triggered:
  When a low level is detected on the INT0 or INT1 pin while global and external interrupts are enabled, the controller jumps to the ISR to handle the interrupt.
• Falling Edge Triggered:
  When a falling edge is detected on the INT0 or INT1 pin while global and external interrupts are enabled, the controller also jumps to the ISR to handle the interrupt.

Monitoring External Interrupts

The TCON (Timer/Counter Register) contains the lower four flag bits that are essential for selecting and monitoring the type of external interrupt and the status of the ISR. This allows for effective management of external interrupts within the 8051 microcontroller.

TCON: Timer/ counter Register

EX0 and EX1 Register: Bit Descriptions

• Bit 3 – IE1
• Description: External Interrupt 1 edge flag. This flag is set by hardware when an interrupt occurs on the INT1 pin and is cleared by hardware once the interrupt has been processed.
• Bit 2 – IT1
• Description: This bit selects the external interrupt event type for the INT1 pin.
  • 1: Sets the interrupt to trigger on a falling edge
  • 0: Sets the interrupt to trigger on a low level
• Bit 1 – IE0
• Description: Interrupt 0 edge flag. This flag is set by hardware when an interrupt occurs on the INT0 pin and is cleared by hardware after the interrupt has been processed.
• Bit 0 – IT0
• Description: This bit selects the external interrupt event type for the INT0 pin.
  • 1: Sets the interrupt to trigger on a falling edge
  • 0: Sets the interrupt to trigger on a low level

Example

Let’s program the external interrupt of the AT89C51 so that when a falling edge is detected on the INT0 pin, the microcontroller will toggle the state of the P1.0 pin.

Programming Steps

1. Enable Global Interrupt: Set the global interrupt enable bit, EA = 1.
2. Enable External Interrupt: Set the external interrupt enable bit, EX0 = 1.
3. Set Interrupt Trigger Mode: Configure the interrupt trigger mode. For falling edge trigger, set IT0 = 1.

/*
 * 8051_External_Interrupt
 * http://www.electronicwings.com
 */

#include <reg51.h>	/* Include x51 header file */
sbit LED = P1^0;	/* set LED on port1 */ 

void Ext_int_Init()				
{
	EA  = 1;	/* Enable global interrupt */
	EX0 = 1;      	/* Enable Ext. interrupt0 */
	IT0 = 1;      	/* Select Ext. interrupt0 on falling edge */
}
											
void External0_ISR() interrupt 0
{
	LED = ~LED;	/* Toggle pin on falling edge on INT0 pin */
} 

void main()
{
	Ext_int_Init(); /* Call Ext. interrupt initialize */
	while(1);
}